This application claims priority under 35 USC § 119 to Korean Patent Application No. 2007-0013241, filed on Feb. 8, 2007 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates generally to signal converters, and more particularly, to a signal converter having a compensation unit.
2. Background of the Invention
In general, a single-ended signal is measured with respect to a fixed potential, such as a ground voltage for example. The signal change of the single-ended signal in response to an input signal is slower than for differential signals, and the single-ended signal is more affected by noise. Accordingly, most circuits used in communication systems process differential signals with superior noise and impedance matching characteristics. In particular, the differential circuit structure is commonly adopted in a system-on-a-chip (SoC) where analog circuits, such as radio frequency (RF) circuits for example, and digital circuits are integrally formed.
Thus, for implementing a differential circuit structure, a signal converter for converting a single-ended signal to differential signals is desired. For example, the signal converter converts the single-ended signal input though an antenna at a receiving end of a communication system to differential signals in an RF frequency band.
FIG. 1 shows a single-ended to differential signal converter 5 according to the prior art as disclosed in U.S. Pat. No. 5,929,710. Referring to FIG. 1, the signal converter 5 receives a single-ended voltage signal Vin and outputs differential amplified current signals I1 and I2. However, in the signal converter 5 of FIG. 1, the differential current signals I1 and I2 may be distorted by the change width of the single-ended voltage signal Vin, noise generated by parasitic capacitances of first and second transistors M1 and M2, or the mismatch between the first and second transistors M1 and M2. For example, the differential current signals I1 and I2 may have different amplitudes (i.e., an amplitude mismatch error) and/or may not have a differential or complementary phase difference of 180° (i.e., a phase mismatch error).
In particular, the differential current signals I1 and I2 may be considerably distorted by the parasitic capacitances of the first and second transistors M1 and M2. Such signal distortion may disadvantageously reduce the frequency band of the communication system having the signal converter 5 of FIG. 1 according to the prior art.